High-Power LED Lighting Aluminium PCB Thermal Analysis

An automotive lighting supplier needed to validate the thermal performance of a compact aluminium-substrate PCB carrying three high-power LEDs and a linear driver circuit, ahead of submitting the design for an OEM request for quotation. The board had to prove it could keep every semiconductor junction within its datasheet temperature limit under worst-case electrical loading, with no physical prototype yet available.

Because the qualification depended on accurate thermal FEM rather than physical testing, the project's foundation was getting the CAD representation of the PCB — and the properties assigned to it — right from the manufacturing data itself, rather than from generic assumptions.

The CAD preparation began with the copper layer itself. Rather than assuming a generic fill density, the actual copper area was measured directly from the Gerber geometry and compared against the board outline area, yielding a precise copper fill fraction. That fraction was then used to correct the thermal conductivity of the copper layer in the model — homogenising the finely detailed trace pattern into an equivalent in-plane conductivity, rather than either meshing every trace explicitly or defaulting to bulk copper values that would have overstated the board's heat-spreading capability.

Each layer in the seven-layer stack-up — overlays, solder masks, copper, dielectric, and aluminium base — was individually reviewed for its relevance to the thermal problem: zero-thickness overlay layers were excluded, negligible-conductivity solder mask layers were retained as thin placeholders, and the dielectric and aluminium base properties were locked to client-confirmed or EBOM-sourced values rather than generic material library defaults. This layer-by-layer discipline meant every material assignment in the final model could be traced back to either a measured Gerber quantity or a confirmed datasheet or client value.

Component-level CAD required a parallel reconciliation effort: each part in the CAD component tree was checked against the electronic bill of materials to confirm package geometry matched the actual specified component, with any mismatches (placeholder library bodies standing in for a same-footprint alternate part) explicitly flagged and their thermal properties substituted for the real component's datasheet values. This prevented a generic CAD library part from silently carrying the wrong thermal resistance into the simulation.

Once the FEM predicted case and pad temperatures at the board surface, junction temperatures for each active component were derived analytically using the manufacturer's junction-to-case thermal resistance (θ_JC): T_j = T_case + (P × θ_JC), with the dissipated power for each component calculated from the confirmed worst-case electrical operating point. Component thermal representations in the FEM (e.g. modelling an LED package as ceramic rather than a high-conductivity generic solid) were deliberately chosen to avoid double-counting the junction-to-case resistance already captured in this analytical step, keeping the FEM and the hand-calculation consistent with one another rather than overlapping.